Power Optimization of Parallel Multipliers in Systems with Variable Word-Length
نویسندگان
چکیده
Parallel multipliers can be optimized using the intrinsic arithmetic equivalencies in their reduction-tree. In this paper, we propose a method to reduce the dynamic power consumption in parallel multipliers, operating within systems with effective word-length variation. Wordlength variation induces a certain pattern of spatiotemporal correlations. The proposed method is capable to take such correlations into account resulting better solutions. The experimental results show about 16-21% reduction in the average number of transitions compared to random par-
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تاریخ انتشار 2008